My Work

Portfolio for myself. You can fid all my contact details of me on this website including my resume. The main framework of this website is ReactJS with support from Font Awesome and Next.js for page routing and server-side rendering. It took me around 8 hours to completely finish it with a relatively high-quality code structure

This is the peripheral board that cotrols the headlight, blinkers, brake light, hazard and the horn of the car. It feaetures a Tiva TM4C123GH6PM MCU. The output voltage (12V) is controlled by 3 load switches (TPS2HB16-Q1A) which provides 6 channels. Those load switches have open circuit detectionn, voltage reporting, etc. functionalities. The information will be gathered and sent to our telemetry server for further analysis and debugginng purpose.

This library is developed based upon the Tivaware API. It involves several team members and takes around 3 years of time to become what it is right now. Since Tiva is the MCU that we use throughout the car, it makes sense to create aother layer of abstraction that fits our need and usage. My main contribution is the ADC library which can be found in gtsr_adc.h and gtsr_adc.c which provides ADC functionality. Future plan is to include extra features such as PWM, DMA and DCON.

The seior design projects maily focuses on the cyber security side on Azure IoT Hub and LTE Gateway security. We are building a BLE Mesh Network that collects data from sensors and send it to Azure IoT Hub via LTE for further analysis. The security side of the busiess features SHA 256 encryption and the has the salted with the IMEI of each BLE device. This means that it's nearly impossible for hackers to steal information from the network without physical access to the devices.

In order to gain finner graulairty on the solar module data (module-based compared to zone-based), Isaac Weintraub and I are developing this board as part of the solar cell aanlysis system. This board features a DS18B20 One-Wire temperature sensor and 2 ADC ports for voltage and shadow monitoring. The collected data will be sent to a backend server writte in Go for cell ideality calculation which will trigger re-simulation accordingly.

This is the first project I have worked on with ARM both as an intern and as a full-time employee. During my internship, I worked on the DCA feature testbench using SystemVerilog and UVM. As a full-time employee, I worked on the System Verification on Operating System (SVOS), focusing on flow improvement and performance bug hunting. I also worked with the formal team on evaluating Security Path Verification (SPV) which is an extension on the Cadance JasperGold Formal Tool.